Safety-Critical Architecture
Partitioning Playbook for Dual-Core Safety Islands
Isolation patterns for lockstep supervisors feeding motor-drive subsystems in infusion platforms.
₩18,200,000 · 4-week engagement
Overview
Explains how to document memory protection unit regions without drowning reviewers in PDFs, including annotated linker fragments and cross-core message budgets.
What is inside
- MPU matrix starter with color cues for auditor walkthroughs
- Dual-bank swap checklist for field-return analysis
- Fault-injection table mapped to FMEA line items
- Watchdog pairing narrative for mixed ASIL goals
- CRC island placement notes for external NOR
- BootROM handshake timing diagram template
- Reviewer FAQ for common dual-core misconceptions
Outcomes
- Cleaner story for why each core owns specific peripherals
- Fewer back-and-forth questions on MPU screenshots
- Tighter linkage between fault handlers and hazard logs
Responsible editor
Sora Kim
Verification specialist focused on mixed-criticality SoCs.
FAQ
Examples lean ARM/RISC-V, yet the documentation patterns transfer to other ISAs.
Field notes
The fault-injection table became the spine of our last design review deck.